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Alejandro Martínez
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2020 – today
- 2022
- [j10]Salvatore Mangano, Enrique Vega, Alejandro Martínez, Daniel Alfonso-Corcuera, Ángel Sanz-Andrés, Santiago Pindado:
Performance Monitoring of Mast-Mounted Cup Anemometers Multivariate Analysis with ROOT. Sensors 22(24): 9774 (2022) - 2021
- [j9]Stefano Mammola, Diego Fontaneto, Alejandro Martínez, Filipe Chichorro:
Impact of the reference list features on the number of citations. Scientometrics 126(1): 785-799 (2021) - [c23]Laura Mercadé, Maria Morant, Amadeu Griol, Roberto Llorente, Alejandro Martínez:
Optical Up/Down-conversion of OFDM Wireless Signals based on Ultracompact Silicon Optomechanical Cavities. OFC 2021: 1-3 - [i1]Rakesh Kumar, Alejandro Martínez, Antonio Gonzalez:
A Variable Vector Length SIMD Architecture for HW/SW Co-designed Processors. CoRR abs/2102.13410 (2021)
2010 – 2019
- 2019
- [j8]Adrià Barja, Alejandro Martínez, Alex Arenas, Pablo Fleurquin, Jordi Nin, José J. Ramasco, Elena Tomás:
Assessing the risk of default propagation in interconnected sectoral financial networks. EPJ Data Sci. 8(1): 32:1-32:20 (2019) - 2017
- [c22]Gem Dot, Alejandro Martínez, Antonio González:
Removing checks in dynamically typed languages through efficient profiling. CGO 2017: 257-268 - [c21]Rakesh Kumar, José Cano, Aleksandar Brankovic, Demos Pavlou, Kyriakos Stavrou, Enric Gibert, Alejandro Martínez, Antonio Gonzalez:
HW/SW co-designed processors: Challenges, design choices and a simulation infrastructure for evaluation. ISPASS 2017: 185-194 - 2016
- [j7]Rakesh Kumar, Alejandro Martínez, Antonio González:
Assisting Static Compiler Vectorization with a Speculative Dynamic Vectorizer in an HW/SW Codesigned Environment. ACM Trans. Comput. Syst. 33(4): 12:1-12:33 (2016) - [c20]Gem Dot, Alejandro Martínez, Antonio González:
ERICO: Effective Removal of Inline Caching Overhead in Dynamic Typed Languages. HiPC 2016: 372-381 - [c19]José Cano, Rakesh Kumar, Aleksandar Brankovic, Demos Pavlou, Kyriakos Stavrou, Enric Gibert, Alejandro Martínez, Antonio González:
Quantitative characterization of the software layer of a HW/SW co-designed processor. IISWC 2016: 138-147 - 2015
- [c18]Gem Dot, Alejandro Martínez, Antonio González:
Analysis and Optimization of Engines for Dynamically Typed Languages. SBAC-PAD 2015: 41-48 - 2014
- [j6]Sepehr P. Khaligh, Alejandro Martínez, Farbod Fahimi, Charles Robert Koch:
A HIL Testbed for Initial Controller Gain Tuning of a Small Unmanned Helicopter. J. Intell. Robotic Syst. 73(1-4): 289-308 (2014) - [j5]Rakesh Kumar, Alejandro Martínez, Antonio González:
Efficient Power Gating of SIMD Accelerators Through Dynamic Selective Devectorization in an HW/SW Codesigned Environment. ACM Trans. Archit. Code Optim. 11(3): 25:1-25:23 (2014) - 2013
- [j4]Rodrigo Pascual, Alejandro Martínez, Ricardo Giesen:
Joint optimization of fleet size and maintenance capacity in a fork-join cyclical transportation system. J. Oper. Res. Soc. 64(7): 982-994 (2013) - [c17]Mar Pérez-Sanagustín, Alejandro Martínez, Carlos Delgado Kloos:
etiquetAR: Tagging Learning Experiences. EC-TEL 2013: 573-576 - [c16]Raquel Martínez, José Manuel Cadenas, M. Carmen Garrido, Alejandro Martínez:
Imputing missing values from low quality data by NIP tool. FUZZ-IEEE 2013: 1-8 - [c15]Rakesh Kumar, Alejandro Martínez, Antonio González:
Speculative dynamic vectorization to assist static vectorization in a HW/SW co-designed environment. HiPC 2013: 79-88 - [c14]Rakesh Kumar, Alejandro Martínez, Antonio González:
Vectorizing for Wider Vector Units in a HW/SW Co-designed Environment. HPCC/EUC 2013: 518-525 - [c13]Rakesh Kumar, Alejandro Martínez, Antonio González:
Dynamic Selective Devectorization for Efficient Power Gating of SIMD Units in a HW/SW Co-Designed Environment. SBAC-PAD 2013: 81-88 - 2012
- [c12]Rakesh Kumar, Alejandro Martínez, Antonio González:
Speculative dynamic vectorization for HW/SW co-designed processors. PACT 2012: 459-460 - 2011
- [c11]José Manuel Cadenas, M. Carmen Garrido, Alejandro Martínez, Raquel Martínez:
Consensus operators for decision making in Fuzzy Random Forest ensemble. ISDA 2011: 1377-1382
2000 – 2009
- 2009
- [j3]Alejandro Martínez, Pedro Javier García, Francisco José Alfaro, José L. Sánchez, José Flich, Francisco J. Quiles, José Duato:
A Switch Architecture Guaranteeing QoS Provision and HOL Blocking Elimination. IEEE Trans. Parallel Distributed Syst. 20(1): 13-24 (2009) - [c10]Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González:
Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading. PACT 2009: 15-25 - [c9]Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González:
Boosting single-thread performance in multi-core systems through fine-grain multi-threading. ISCA 2009: 474-483 - 2007
- [j2]Alejandro Martínez, Raúl Martínez, Francisco José Alfaro, José L. Sánchez:
A low-cost strategy to provide full QoS support in Advanced Switching networks. J. Syst. Archit. 53(7): 355-368 (2007) - [j1]Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, Francisco J. Quiles, José Duato:
A New Cost-Effective Technique for QoS Support in Clusters. IEEE Trans. Parallel Distributed Syst. 18(12): 1714-1726 (2007) - [c8]Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, José Duato:
Providing Full QoS with 2 VCs in High-Speed Switches. ICOIN 2007: 345-354 - [c7]Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, José Duato:
Deadline-based QoS Algorithms for High-performance Networks. IPDPS 2007: 1-9 - [c6]Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, José Duato:
Efficient Switches with QoS Support for Clusters. IPDPS 2007: 1-6 - 2006
- [c5]Alejandro Martínez, Pedro Javier García, Francisco José Alfaro, José L. Sánchez, José Flich, Francisco J. Quiles, José Duato:
Towards a Cost-Effective Interconnection Network Architecture with QoS and Congestion Management Support. Euro-Par 2006: 884-895 - [c4]Alejandro Martínez, George Apostolopoulos, Francisco José Alfaro, José L. Sánchez, José Duato:
QoS Support for Video Transmission in High-Speed Interconnects. HPCC 2006: 631-641 - [c3]Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, José Duato:
Scalable Low-Cost QoS Support for Single-chip Switches. ICPADS (1) 2006: 439-446 - [c2]Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, José Duato:
Full QoS Support with 2 VCs for Single-chip Switches. NCA 2006: 239-242 - 2005
- [c1]Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, José Duato:
Providing Full QoS Support in Clusters Using Only Two VCs at the Switches. HiPC 2005: 158-169
Coauthor Index
aka: Francisco José Alfaro
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