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ORCIDCristian Constantinescu
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2020 – today
- 2021
[c18]Cristian Constantinescu:
AMD EPYC™ 7002 Series - A Processor with Improved Soft Error Resilience. DSN (Supplements) 2021: 33-36
2010 – 2019
- 2014
- [c17]Cristian Constantinescu, Srini Krishnamoorthy, Tuyen Nguyen:
Estimating the effect of single-event upsets on microprocessors. DFT 2014: 185-190 - 2012
- [c16]Cristian Constantinescu, Mike Butler, Chris Weller:
Error injection-based study of soft error propagation in AMD Bulldozer microprocessor module. DSN 2012: 1-6 - [e1]Cristian Constantinescu, Miguel P. Correia:
2012 Ninth European Dependable Computing Conference, Sibiu, Romania, May 8-11, 2012. IEEE Computer Society 2012, ISBN 978-1-4673-0938-7 [contents] - 2011
- [c15]Jean Arlat, Cristian Constantinescu, Johan Karlsson, Takashi Nanya, Alan Wood:
Introduction to the fifth workshop on dependable and secure nanocomputing. DSN Workshops 2011: 39-40 - [c14]Jean Arlat, Cristian Constantinescu, Johan Karlsson, Takashi Nanya, Alan Wood:
Introduction to the fifth workshop on dependable and secure nanocomputing. DSN 2011: 588-589 - 2010
- [c13]Jean Arlat, Cristian Constantinescu, Ravishankar K. Iyer, Johan Karlsson, Michael Nicolaidis:
Fourth workshop on dependable and secure nanocomputing. DSN 2010: 619-620
2000 – 2009
- 2009
- [c12]Jean Arlat, Cristian Constantinescu, Ravishankar K. Iyer, Johan Karlsson, Michael Nicolaidis:
Third workshop on dependable and secure nanocomputing. DSN 2009: 596-597 - 2008
- [c11]Cristian Constantinescu, Ishwar Parulkar, R. Harper, Sarah Michalak:
Silent Data Corruption - Myth or reality? DSN 2008: 108-109 - [c10]Jean Arlat, Cristian Constantinescu, Ravishankar K. Iyer, Michael Nicolaidis:
Second workshop on dependable and secure nanocomputing. DSN 2008: 546-547 - 2005
- [j6]Cristian Constantinescu:
Dependability evaluation of a fault-tolerant processor by GSPN modeling. IEEE Trans. Reliab. 54(3): 468-474 (2005) - [c9]Cristian Constantinescu, Karama Kanoun, Henrique Madeira
, Brendan Murphy, Ira Pramanick, Aaron B. Brown:
Dependability Benchmarking of Computing Systems - Panel Statement. DSN 2005: 400 - [c8]Cristian Constantinescu:
Neutron SER Characterization of Microprocessors. DSN 2005: 754-759 - 2003
- [j5]Cristian Constantinescu:
Trends and Challenges in VLSI Circuit Reliability. IEEE Micro 23(4): 14-19 (2003) - [j4]Cristian Constantinescu:
Experimental evaluation of error-detection mechanisms. IEEE Trans. Reliab. 52(1): 53-57 (2003) - 2002
- [c7]Cristian Constantinescu:
Impact of Deep Submicron Technology on Dependability of VLSI Circuits. DSN 2002: 205-209 - 2001
- [c6]Cristian Constantinescu:
Dependability Analysis of a Fault-Tolerant Processor. PRDC 2001: 63-67 - 2000
- [j3]Cristian Constantinescu:
Teraflops Supercomputer: Architecture and Validation of the Fault Tolerance Mechanisms. IEEE Trans. Computers 49(9): 886-894 (2000)
1990 – 1999
- 1999
- [c5]Cristian Constantinescu:
Assessing Error Detection Coverage by Simulated Fault Injection. EDCC 1999: 161-170 - [c4]Cristian Constantinescu:
Using Physical and Simulated Fault Injection to Evaluate Error Detection Mechanisms. PRDC 1999: 186-192 - 1998
- [c3]Cristian Constantinescu:
Validation of the Fault/Error Handling Mechanisms of the Teraflops Supercomputer. FTCS 1998: 382-389 - 1990
- [j2]Cristian Constantinescu:
A perfomability approach to the cost minimization of a class of gracefully degrading computer systems. Microprocessing and Microprogramming 29(4): 199-204 (1990)
1980 – 1989
- 1989
- [j1]Cristian Constantinescu:
Effect of transient faults on gracefully degrading processor arrays. Microprocessing and Microprogramming 26(1): 23-30 (1989) - [c2]Cristian Constantinescu, Calin Sandovici:
Microcomputer-Based, Gracefully Degrading Industrial Controller. Fehlertolerierende Rechensysteme 1989: 124-133 - [c1]Cristian Constantinescu, Calin Sandovici:
A Fault-Tolerant Microcomputer for Advanced Control: Architecture and Performability Analysis. RTSS 1989: 222-228
Coauthor Index
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