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ORCIDRitochit Chakraborty
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2010 – 2019
- 2015
[j2]Cheng Zhuo, Gustavo R. Wilke, Ritochit Chakraborty, Alaeddin A. Aydiner, Sourav Chakravarty, Wei-Kai Shih:
Silicon-Validated Power Delivery Modeling and Analysis on a 32-nm DDR I/O Interface. IEEE Trans. Very Large Scale Integr. Syst. 23(9): 1760-1771 (2015)- 2012
- [c6]Cheng Zhuo, Gustavo R. Wilke, Ritochit Chakraborty, Alaeddin A. Aydiner, Sourav Chakravarty, Wei-Kai Shih:
A silicon-validated methodology for power delivery modeling and simulation. ICCAD 2012: 255-262 - 2010
- [j1]Sumit Roy, Vikram Jandhyala, Joshua R. Smith, David Wetherall, Brian P. Otis, Ritochit Chakraborty, Michael Buettner, Daniel J. Yeager, You-Chang Ko, Alanson P. Sample
:
RFID: From Supply Chains to Sensor Nets. Proc. IEEE 98(9): 1583-1592 (2010) - [c5]Ritochit Chakraborty, Arun V. Sathanur, Vikram Jandhyala:
Towards Active-Passive Co-synthesis of Multi-gigaHertz Radio Frequency Circuits. VLSI Design 2010: 381-386
2000 – 2009
- 2009
- [c4]Ritochit Chakraborty, Arun V. Sathanur, Vikram Jandhyala:
Active-passive co-synthesis of multi-GigaHertz radio frequency circuits with broadband parametric macromodels of on-chip passives. ICCAD 2009: 759-766 - 2008
- [c3]Arun V. Sathanur, Ritochit Chakraborty, Vikram Jandhyala:
Accurate statistical analysis of a differential low noise amplifier using a combined SPICE-field solver approach. ISCAS 2008: 884-887 - 2007
- [c2]Arun V. Sathanur, Ritochit Chakraborty, Vikram Jandhyala:
Statistical analysis of RF circuits using combined circuit simulator-full wave field solver approach. ICCAD 2007: 11-17 - 2006
- [c1]Ritochit Chakraborty, Mukesh Ranjan, Ranga Vemuri:
Symbolic Time-Domain Behavioral and Performance Modeling of Linear Analog Circuits Using an Efficient Symbolic Newton-Iteration Algorithm for Pole Extraction. VLSI Design 2006: 689-694
Coauthor Index
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