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ORCIDUlrich Golze
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2010 – 2019
- 2012
[c8]Ulrich Golze:
25 Jahre Entwurf integrierter Schaltungen. 40 Jahre Informatik @ Braunschweig 2012: 116-123
2000 – 2009
- 2004
- [c7]Helge Böhme, Ulrich Golze:
Lightweight Firm Real-Time Extensions for Low Memory Profile Java Systems. OTM Workshops 2004: 303-314 - 2003
- [c6]Nico Kasprzyk, Andreas Koch, Ulrich Golze, Michael Rock:
An Improved Intermediate Representation for Datapath Generation. Engineering of Reconfigurable Systems and Algorithms 2003: 88-94 - 2001
- [c5]Tamer Çatalkaya, Ulrich Golze:
Efficient Production of Computer-Based Training in Chip Desig. MSE 2001: 12-13
1990 – 1999
- 1998
- [c4]Tamer Çatalkaya, Ulrich Golze:
Entwicklung multimedialer Lernprogramme im Chip-Entwurf für und als Teil der Lehre. Workshop Multimedia-Systeme, GI Jahrestagung 1998: 9-18 - [c3]Peter Blinzer, Ulrich Golze, Ulrich Holtmann:
Entwurf von Controller-Schaltungen für Kommunikationsprotokolle mit dem Protocol-Compiler von Synopsys. MBMV 1998: 50-58 - 1996
- [b3]Ulrich Golze:
VLSI chip design with the hardware description language VERILOG - an introduction based on a large RISC processor design. Springer 1996, ISBN 978-3-540-60032-9, pp. I-XIV, 1-358 - 1995
- [b2]Ulrich Golze:
Der RISC-Prozessor TOOBSIE - Hintergrundband zum Buch "VLSI-Entwurf eines RISC-Prozessors" für den Entwurfsspezialisten. Vieweg 1995, ISBN 978-3-528-05417-5, pp. I-VIII, 1-430 - [b1]Ulrich Golze:
VLSI-Entwurf eines RISC-Prozessors - eine Einführung in das Design großer Chips und die Hardware-Beschreibungssprache VERILOG HDL. Lehrbuch Informatik, Vieweg 1995, ISBN 978-3-528-05416-8, pp. I-XXII, 1-435
1980 – 1989
- 1988
- [c2]Volker Henkel, Ulrich Golze:
RISCE - A Reduced Instruction Set Circuit Extractor for Hierarchical VLSI Layout Verification. DAC 1988: 465-470 - 1986
- [j6]Jürgen Hannken-Illjes, Ulrich Golze:
Ein hierarchischer inkrementeller Designrulechecker. it Inf. Technol. 28(3): 132-138 (1986) - [j5]Holger Sedlak, Ulrich Golze:
Ein Public-Key-Code Kryptographie-Prozessor. it Inf. Technol. 28(3): 157-161 (1986) - 1982
- [j4]Ulrich Golze, Lutz Priese:
Petri Net Implementations by a Universal Cell Space. Inf. Control. 53(1/2): 121-138 (1982) - 1981
- [j3]Hans Georg Carstens, Ulrich Golze:
Recursive Paths in Cross-Connected Trees and an Application to Cell Spaces. Math. Syst. Theory 15(1): 29-37 (1981)
1970 – 1979
- 1979
- [j2]Ulrich Golze:
Lokale und globale Synchronisation. J. Inf. Process. Cybern. 15(8/9): 435-443 (1979) - 1978
- [j1]Ulrich Golze:
(A-)Synchronous (Non-)Deterministic Cell Spaces Simulating Each Other. J. Comput. Syst. Sci. 17(2): 176-193 (1978) - 1975
- [c1]Ulrich Golze:
Differences between 1- and 2-Dimensional Cell Spaces. Automata, Languages, Development 1975: 369-384
Coauthor Index
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