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Sung-No Lee

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2020 – today

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2022
[c3]
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  - conf/vlsit/MoonOPLPLHSCCS22
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  - https://dblp.org/rec/conf/vlsit/MoonOPLPLHSCCS22
Kyoung-Jun Moon, Dong-Ryeol Oh, Young-Hyo Park, Kyung-Hoon Lee, Sun-Jae Park, Sung-No Lee, Hee-Chang Hwang, Hyo-Chul Shin, Young-Jae Cho, Michael Choi, Jongshin Shin:
A 12-bit 10GS/s 16-Channel Time-Interleaved ADC with a Digital Processing Timing-Skew Background Calibration in 5nm FinFET. VLSI Technology and Circuits 2022: 172-173

2000 – 2009

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2009
[c2]
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  - conf/cicc/KwonHKLYPKM09
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Sunwoo Kwon, Pavan Kumar Hanumolu, Sang-Ho Kim, Sung-No Lee, Seung-Bin You, Ho-Jin Park, Jae-Whui Kim, Un-Ku Moon:
An 11mW 100MHz 16X-OSR 64dB-SNDR hybrid CT/DT ΔΣ ADC with relaxed DEM timing. CICC 2009: 171-174
2008
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Moo-Yeol Choi, Sung-No Lee, Seung-Bin You, Wang-Seup Yeum, Ho-Jin Park, Jae-Whui Kim, Hae-Seung Lee:
A 101-dB SNR hybrid delta-sigma audio ADC using post integration time control. CICC 2008: 89-92

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