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Joshua Fazekas
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Journal Articles
- 2007
- [j4]Alex K. Jones, Raymond Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle:
An automated, FPGA-based reconfigurable, low-power RFID tag. Microprocess. Microsystems 31(2): 116-134 (2007) - 2006
- [j3]Raymond R. Hoare, Alex K. Jones, Dara Kusic, Joshua Fazekas, John Foster, Shen Chih Tung, Michael L. McCloud:
Rapid VLIW Processor Customization for Signal Processing Applications Using Combinational Hardware Functions. EURASIP J. Adv. Signal Process. 2006 (2006) - [j2]Alex K. Jones, Raymond R. Hoare, Dara Kusic, Justin Stander, Gayatri Mehta, Joshua Fazekas:
A VLIW Processor With Hardware Functions: Increasing Performance While Reducing Power. IEEE Trans. Circuits Syst. II Express Briefs 53-II(11): 1250-1254 (2006) - [j1]Alex K. Jones, Raymond Hoare, Dara Kusic, Gayatri Mehta, Joshua Fazekas, John Foster:
Reducing power while increasing performance with supercisc. ACM Trans. Embed. Comput. Syst. 5(3): 658-686 (2006)
Conference and Workshop Papers
- 2006
- [c5]Alex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle:
An automated, reconfigurable, low-power RFID tag. DAC 2006: 131-136 - [c4]Alex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle:
A Field Programmable RFID Tag and Associated Design Flow. FCCM 2006: 165-174 - 2005
- [c3]Alex K. Jones, Raymond Hoare, Dara Kusic, Joshua Fazekas, John Foster:
An FPGA-based VLIW processor with custom hardware execution. FPGA 2005: 107-117 - [c2]Dara Kusic, Raymond Hoare, Alex K. Jones, Joshua Fazekas, John Foster:
Extracting Speedup From C-Code With Poor Instruction-Level Parallelism. IPDPS 2005 - 2004
- [c1]Alex K. Jones, Raymond Hoare, Ivan S. Kourtev, Joshua Fazekas, Dara Kusic, John Foster, Sedric Boddie, Ahmed Muaydh:
A 64-way VLIW/SIMD FPGA architecture and design flow. ICECS 2004: 499-502
Coauthor Index
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