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Journal Articles
- 2009
[j1]Fabrice Chevalier, Deepak D'Souza, M. Raj Mohan, Pavithra Prabhakar:
Automata and logics over finitely varying functions. Ann. Pure Appl. Log. 161(3): 324-336 (2009)
Conference and Workshop Papers
- 2019
- [c7]Amol Wakankar, Paritosh K. Pandya, Raj Mohan Matteplackel:
DCSynth: Guided Reactive Synthesis with Soft Requirements. VSTTE 2019: 124-142 - 2017
- [c6]Raj Mohan Matteplackel, Paritosh K. Pandya, Amol Wakankar:
Formalizing Timing Diagram Requirements in Discrete Duration Calculus. SEFM 2017: 253-268 - 2014
- [c5]Patricia Bouyer, Nicolas Markey
, Raj Mohan Matteplackel:
Averaging in LTL. CONCUR 2014: 266-280 - 2012
- [c4]Deepak D'Souza, Raj Mohan Matteplackel:
A Compositional Hierarchical Monitoring Automaton Construction for LTL. ICTAC 2012: 16-29 - 2010
- [c3]Sumesh Divakaran, Deepak D'Souza, Raj Mohan Matteplackel:
Conflict-tolerant specifications in temporal logic. ISEC 2010: 103-110 - [c2]Sumesh Divakaran, Deepak D'Souza, M. Raj Mohan:
Conflict-Tolerant Real-Time Specifications in Metric Temporal Logic. TIME 2010: 35-42 - 2005
- [c1]Deepak D'Souza, M. Raj Mohan:
Eventual Timed Automata. FSTTCS 2005: 322-334
Parts in Books or Collections
- 2012
- [p1]Fabrice Chevalier, Deepak D'Souza, Raj Mohan Matteplackel, Pavithra Prabhakar:
Automata and Logics over Signals. Modern Applications of Automata Theory 2012: 555-584
Informal and Other Publications
- 2019
- [i3]Amol Wakankar, Paritosh K. Pandya, Raj Mohan Matteplackel:
DCSYNTH: A Tool for Guided Reactive Synthesis with Soft Requirements. CoRR abs/1903.03991 (2019) - 2017
- [i2]Raj Mohan Matteplackel, Paritosh K. Pandya, Amol Wakankar:
Formalizing Timing Diagram Requirements in Discrete Duration Calulus. CoRR abs/1705.04510 (2017) - [i1]Amol Wakankar, Paritosh K. Pandya, Raj Mohan Matteplackel:
DCSYNTH: Guided Reactive Synthesis with Soft Requirements for Robust Controller and Shield Synthesis. CoRR abs/1711.01823 (2017)
Coauthor Index
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