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ORCIDVinayaka Jyothi
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2010 – 2019
- 2018
[j1]Vinayaka Jyothi
, Sateesh Addepalli, Ramesh Karri:
DPFEE: A High Performance Scalable Pre-Processor for Network Security Systems. IEEE Trans. Multi Scale Comput. Syst. 4(1): 55-68 (2018)- 2017
- [c8]Vinayaka Jyothi, Ashik Poojari, Richard Stern, Ramesh Karri:
Fingerprinting Field Programmable Gate Arrays. ICCD 2017: 337-340 - [c7]Vinayaka Jyothi, Prashanth Krishnamurthy, Farshad Khorrami, Ramesh Karri:
TAINT: Tool for Automated INsertion of Trojans. ICCD 2017: 545-548 - 2016
- [c6]Vinayaka Jyothi, Manasa Thoonoli, Richard Stern, Ramesh Karri:
FPGA Trust Zone: Incorporating trust and reliability into FPGA designs. ICCD 2016: 600-605 - [c5]Vinayaka Jyothi, Xueyang Wang, Sateesh Addepalli, Ramesh Karri:
BRAIN: BehavioR Based Adaptive Intrusion Detection in Networks: Using Hardware Performance Counters to Detect DDoS Attacks. VLSID 2016: 587-588 - 2015
- [c4]Vinayaka Jyothi, Sateesh Addepalli, Ramesh Karri:
Deep Packet Field Extraction Engine (DPFEE): A pre-processor for network intrusion detection and denial-of-service detection systems. ICCD 2015: 266-272 - 2014
- [c3]Youngok K. Pino, Vinayaka Jyothi, Matthew French:
Intra-die process variation aware anomaly detection in FPGAs. ITC 2014: 1-6 - 2011
- [c2]Jeyavijayan Rajendran, Vinayaka Jyothi, Ramesh Karri:
Blue team red team approach to hardware trust assessment. ICCD 2011: 285-288 - [c1]Jeyavijayan Rajendran, Vinayaka Jyothi, Ozgur Sinanoglu, Ramesh Karri:
Design and analysis of ring oscillator based Design-for-Trust technique. VTS 2011: 105-110
Coauthor Index
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