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ORCIDTaras Iakymchuk
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2010 – 2019
- 2019
[j5]Leandro D. Medus
, Taras Iakymchuk, José Vicente Francés-Víllora, Manuel Bataller-Mompeán, Alfredo Rosado Muñoz:
A Novel Systolic Parallel Hardware Architecture for the FPGA Acceleration of Feedforward Neural Networks. IEEE Access 7: 76084-76103 (2019)- 2017
- [j4]Amirreza Yousefzadeh, Miroslaw Jablonski, Taras Iakymchuk, Alejandro Linares-Barranco, Alfredo Rosado, Luis A. Plana, Steve Temple, Teresa Serrano-Gotarredona, Steve B. Furber, Bernabé Linares-Barranco:
On Multiple AER Handshaking Channels Over High-Speed Bit-Serial Bidirectional LVDS Links With Flow-Control and Clock-Correction on Commercial FPGAs for Scalable Neuromorphic Systems. IEEE Trans. Biomed. Circuits Syst. 11(5): 1133-1147 (2017) - [c8]Amirreza Yousefzadeh, Miroslaw Jablonski, Taras Iakymchuk, Alejandro Linares-Barranco, Alfredo Rosado Muñoz, Luis A. Plana, Teresa Serrano-Gotarredona, Steve B. Furber, Bernabé Linares-Barranco:
Live demonstration: Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems. ISCAS 2017: 1 - [c7]Amirreza Yousefzadeh, Miroslaw Jablonski, Taras Iakymchuk, Alejandro Linares-Barranco, Alfredo Rosado Muñoz, Luis A. Plana, Teresa Serrano-Gotarredona, Stephen B. Furber, Bernabé Linares-Barranco:
Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems. ISCAS 2017: 1-4 - [i1]Juan Barrios-Aviles, Taras Iakymchuk, Jorge Samaniego, Alfredo Rosado Muñoz:
An Event-based Fast Movement Detection Algorithm for a Positioning Robot Using POWERLINK Communication. CoRR abs/1707.07188 (2017) - 2016
- [j3]Silvia Casans Berga, Alfredo Rosado Muñoz, Taras Iakymchuk:
Novel Resistance Measurement Method: Analysis of Accuracy and Thermal Dependence with Applications in Fiber Materials. Sensors 16(12): 2129 (2016) - [j2]Taras Iakymchuk, Alfredo Rosado Muñoz, Manuel Bataller-Mompeán, José Vicente Francés-Víllora, Emmanuel Ovie Osimiry:
Versatile Direct and Transpose Matrix Multiplication with Chained Operations: An Optimized Architecture Using Circulant Matrices. IEEE Trans. Computers 65(11): 3470-3479 (2016) - [c6]Juan Barrios-Aviles, Taras Iakymchuk, Alfredo Rosado Muñoz, José V. Francés-Víllora, Manuel Bataller-Mompeán, Juan Guerrero-Martínez:
Event-based encoding from digital magnetic compass and ultrasonic distance sensor for navigation in mobile systems. INDIN 2016: 640-645 - 2015
- [j1]Taras Iakymchuk, Alfredo Rosado Muñoz, Juan Guerrero-Martínez, Manuel Bataller-Mompeán, José V. Francés-Víllora:
Simplified spiking neural network architecture and STDP learning algorithm applied to image classification. EURASIP J. Image Video Process. 2015: 4 (2015) - 2014
- [c5]Taras Iakymchuk, Alfredo Rosado, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, Angel Jiménez-Fernandez, Alejandro Linares-Barranco, Gabriel Jiménez-Moreno:
An AER handshake-less modular infrastructure PCB with x8 2.5Gbps LVDS serial links. ISCAS 2014: 1556-1559 - 2012
- [c4]Alfredo Rosado, Taras Iakymchuk, Manuel Bataller, Marek Wegrzyn:
Hardware-efficient matrix inversion algorithm for complex adaptive systems. ICECS 2012: 41-44 - [c3]Taras Iakymchuk, Alfredo Rosado, Emilio Soria-Olivas, Manuel Bataller:
Implementation of a new adaptive algorithm using fuzzy cost function and robust to impulsive noise. ICECS 2012: 45-48 - [c2]Taras Iakymchuk, Alfredo Rosado, José V. Francés, Manuel Bataller:
Fast spiking neural network architecture for low-cost FPGA devices. ReCoSoC 2012: 1-6 - 2011
- [c1]Taras Iakymchuk, Maciej Nikodem, Krzysztof Kepa:
Temperature-based covert channel in FPGA systems. ReCoSoC 2011: 1-7
Coauthor Index
aka: Alfredo Rosado
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