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2010 – 2019
- 2015
[c7]Elliott Forbes, Zhenqian Zhang, Randy Widialaksono, Brandon H. Dwiel, Rangeen Basu Roy Chowdhury, Vinesh Srinivasan, Steve Lipa, Eric Rotenberg, W. Rhett Davis, Paul D. Franzon:
Under 100-cycle thread migration latency in a single-ISA heterogeneous multi-core processor. Hot Chips Symposium 2015: 1- 2014
- [c6]Elliott Forbes, Niket Kumar Choudhary, Brandon H. Dwiel, Eric Rotenberg:
Design-effort alloy: Boosting a highly tuned primary core with untuned alternate cores. ICCD 2014: 408-415 - 2013
- [c5]Eric Rotenberg, Brandon H. Dwiel, Elliott Forbes, Zhenqian Zhang, Randy Widialaksono, Rangeen Basu Roy Chowdhury, Nyunyi M. Tshibangu, Steve Lipa, W. Rhett Davis
, Paul D. Franzon:
Rationale for a 3D heterogeneous multi-core processor. ICCD 2013: 154-168 - [c4]Shivam Priyadarshi, Niket K. Choudhary, Brandon H. Dwiel, Ankita Upreti, Eric Rotenberg, William Rhett Davis, Paul D. Franzon:
Hetero2 3D integration: A scheme for optimizing efficiency/cost of Chip Multiprocessors. ISQED 2013: 1-7 - 2012
- [j1]Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay A. Shah, Hiran Mayukh, Jayneel Gandhi, Brandon H. Dwiel, Sandeep Navada, Hashem Hashemi Najaf-abadi, Eric Rotenberg:
FabScalar: Automating Superscalar Core Design. IEEE Micro 32(3): 48-59 (2012) - [c3]Brandon H. Dwiel, Niket Kumar Choudhary, Eric Rotenberg:
FPGA modeling of diverse superscalar processors. ISPASS 2012: 188-199 - [c2]Niket K. Choudhary, Brandon H. Dwiel, Eric Rotenberg:
A physical design study of fabscalar-generated superscalar cores. VLSI-SoC 2012: 165-170 - 2011
- [c1]Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay A. Shah, Hiran Mayukh, Jayneel Gandhi, Brandon H. Dwiel, Sandeep Navada, Hashem Hashemi Najaf-abadi, Eric Rotenberg:
FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template. ISCA 2011: 11-22
Coauthor Index
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