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ORCIDIEEE Transactions on Computers, Volume 17
Volume 17, Number 1, January 1968
- Joel N. Sturman:
An Iteratively Structured General-Purpose Digital Computer. 2-9 - Joel N. Sturman:
Asynchronous Operation of an Iteratively Structured General-Purpose Digital Computer. 10-17 - Janusz A. Brzozowski, Shanker Singh:
Definite Asynchronous Sequential Circuits. 18-26 - Florin Stuanciulescu, Mihai Francisc Anton Oprescu:
A Mathematical Model of Finite Random Sequential Automata. 27-31 - Chao-Wei Mow, King-Sun Fu:
An Approach for the Realization of Multithreshold Threshold Elements. 32-46 - Chao-Wei Mow, King-Sun Fu:
Input Tolerance Considerations for Multithreshold Threshold Elements. 46-54 - Kenneth H. Konkle:
An Analog Comparator as a Pseudo-Light Pen for Computer Displays. 54-55 - Michael A. Harrison:
On Equivalence of State Assignments. 55-57 - Chao-Wei Mow, King-Sun Fu:
Generation of Self-Dual and Self-Complementary Dual Functions. 57-66 - Michael Yoeli:
Ternary Cellular Cascades. 66-67 - Monroe M. Newborn:
Maximal Memory Binary Input-Binary Output Finite-Memory Sequential Machines. 67-71 - David R. Smith:
A Partitioning Method for Combinational Synthesis. 72-75 - Robert O. Winder:
Symmetry Types in Threshold Logic. 75-78 - John R. Smith, Cyrus O. Harbourt:
An Adaptive Threshold Logic Gate Using Capacitive Analog Weights. 78-81 - R. Jeffrey Leake, H. L. Althaus:
DDA Scaling Graph. 81-84 - Kenneth C. Knowlton:
A Combination Hardware-Software Debugging System. 84-86 - Edward G. Coffman Jr.:
A Simple Probability Model Yielding Performance Bounds for Modular Memory Systems. 86-89 - J. P. Seddon, R. A. Johnson:
The Simulation of Variable Delay. 89-94 - W. Fred Cutlip:
On the Cascade Decomposition of Prefix Automata. 94-95 - Suresh Chander:
On Dolotta-McCluskey Technique. 95
Volume 17, Number 2, February 1968
- E. James Angelo Jr., John Logan, Kenneth W. Sussman:
The Separation Technique: A Method for Simulating Transistors to Aid Integrated Circuit Design. 113-116 - Peter R. Schneider, Donald L. Dietmeyer:
An Algorithm for Synthesis of Multiple-Output Combinational Logic. 117-128 - Douglas B. Armstrong, Arthur D. Friedman, Premachandran R. Menon:
Realization of Asynchronous Sequential Circuits Without Inserted Delay Elements. 129-134 - Sheldon B. Akers Jr.:
On Maximum Inversion with Minimum Inverters. 134-135 - Domenico Ferrari:
Fast Carry-Propagation Iterative Networks. 136-145 - Stephen H. Unger:
A Row Assignment for Delay-Free Realizations of Flow Tables Without Essential Hazards. 146-151 - Rocco H. Urbano:
Structure and Function in Polyfunctional Nets. 152-173 - Thomas J. McAvoy:
Least-Square Dead-Time Approximations. 174-178 - William G. Wee, King-Sun Fu:
An Adaptive Procedure for Multiclass Pattern Classification. 178-182 - Charles M. Allen, Donald D. Givone:
A Minimization Technique for Multiple-Valued Logic Systems. 182-184 - Peter Weiner, Thomas F. Dwyer:
Discussion of Some Flaws in the Classical Theory of Two-Level Minimization of Multiple-Output Switching Networks. 184-186 - Victor Azgapetian:
Comment on "An Analog Photoresistive Multiplier". 188 - Mark E. Connelly:
Author's Reply2. 188 - Donald L. Epley:
R68-5 Models of Computational Systems-Cyclic to Acyclic Graph Transformations. 191-192 - Jon C. Strauss:
R68-6 Regression Analysis and Parameter Identification. 192 - B. C. Biega:
R68-7 Analog Simulation of Ferroresonant System Including Analysis of Hysteresis Loop. 192
Volume 17, Number 3, March 1968
- Charles H. Thomas:
Transport Time-Delay Simulation for Transmission Line Representation. 205-214 - Shuzo Yajima, Toshihide Ibaraki:
A Theory of Completely Monotonic Functions and its Applications to Threshold Logic. 214-229 - Azaria Paz, Bezalel Peleg:
On Concatenative Decompositions of Regular Events. 229-237 - A. Bart Howe, Clarence L. Coates:
Logic Hazards in Threshold Networks. 238-251 - H. Allen Curtis:
Polylinear Sequential Circuit Realizations of Finite Automata. 251-259 - Barry M. Epstein:
A 48-Channel PCM Tape Data-Acquisition System. 259-267 - William Thomas Marquitz, Y. Tokad:
On Improving the Analog Computer Solutions of Linear Systems. 268-270 - K. Doty, H. Frank:
A Theorem on Linearity. 270-272 - Stanley R. Petrick, George C. Sethares:
On the Determination of Complete Sets of Logical Functions. 273 - Martin A. Fischler, Meyer Tannenbaum:
Assumptions in the Threshold Synthesis of Symmetric Switching Functions. 273-279 - P. K. Sinha Roy:
A Slide Rule Device for Checking 2-Summability. 279-283 - Jehuda Kella, Alexander Shani:
On the Reversibility of Computations in a Digital Differential Analyzer. 283-284 - Ralph E. Keirstead:
R68-8 Language Directed Computer Design. 298 - Lee C. Thomas:
R68-9 A Computer Simulation of Electrical Loss and Loading Effect in Magnetic Recording. 298-300
Volume 17, Number 4, April 1968
- R. A. Manske:
Computor Simulation of Narrowband Systems. 301-308 - Donald R. Haring:
On Shift-Register Realizations of Sequential Machines and Finite-State Universal Sequential Machines. 309-312 - C. C. Su, Stephen Sik-Sang Yau:
Unitary Shift-Register Realizations of Sequential Machines. 312-324 - Clarence M. Ablow, Michael Yoeli, James Turner:
Irreducible Decompositions of Transformation Graphs by Assignment Techniques. 325-329 - James L. Massey, Michael K. Sain:
Inverses of Linear Sequential Circuits. 330-337 - Shuzo Yajima, Toshihide Ibaraki:
Realization of Arbitrary Logic Functions by Completely Monotonic Functions and Its Applications to Threshold Logic. 338-351 - William H. Kautz:
Fault Testing and Diagnosis in Combinational Digital Circuits. 352-366 - Fred W. Smith:
Pattern Classifier Design by Linear Programming. 367-372 - Harry Andrews:
A High-Speed Algorithm for the Computer Generation of Fourier Transforms. 373-375 - Stephen J. Kahne:
Sensitivity-Function Calculation in Linear Systems Using Time-Shared Analog Integration. 375-379 - Amos Nathan, Jonathan Molcho:
Improved Voltage Selector and Cascade Multiplier Circuits. 380-382 - S. B. Matthews:
Generation of Pseudorandom Noise Having a Gaussian Spectral Density. 382-385 - John V. Wait:
Correction to "State-Space Methods for Designing Digital Simulations of Continuous Fixed Linear Systems". 385 - Shuzo Yajima, Toshihide Ibaraki, I. Kawano:
On Autonomous Logic Nets of Threshold Elements. 385-391 - Stephen Sik-Sang Yau, Daniel L. Ostapko:
Realization of a Class of Switching Functions by Threshold-Logic Networks. 391-399 - John H. Munson, Richard O. Duda, Peter E. Hart:
Experiments with Highleyman's Data. 399-401 - John L. Douce:
Comment on "Computation of Time-Phase Displacements of Binary Linear Sequence Generators". 402 - Dennis W. Fife:
R68-10 SODAS and a Methodology for System Design. 405 - Hugh C. Lauer:
R68-11 Intercommunication of Processors and Memory. 405-406 - Norman R. Nielsen:
R68-12 An Experimental Model of System/ 360. 406-407 - Gary D. Hornbuckle:
R68-13 An Introduction to Computer Graphic Terminals. 407 - Frank G. Curl:
R68-14 Microprogrammed Control in Problem-Oriented Languages. 407-408 - Edward E. Markson:
R68-15 Trajectory Computation by a Hybrid Computer for the Apollo Midcourse Abort Simulation. 408 - Donald T. Greenwood:
R68-16 A Mathematical Model for the Investigation of Three-Dimensional Fields with Asymmetric Boundaries. 409 - Clark F. Crocker:
R68-17 Synthesis of Resistive Digital-to-Analog Conversion Ladders for Arbitrary Codes with Fixed Positive Weights. 409-410 - Brian R. Gaines:
R68-18 Random Pulse Machines. 410
Volume 17, Number 5, May 1968
- Wayne A. Davis:
Single Shift-Register Realizations for Sequential Machines. 421-431 - Angelo Raffaele Meo:
Modular Tree Structures. 432-442 - William H. Kautz, Karl N. Levitt, Abraham Waksman:
Cellular Interconnection Arrays. 443-451 - Taylor L. Booth:
Statistical Properties of Random Digital Sequences. 452-461 - Hwa C. Torng:
An Algorithm for Finding Secondary Assignments of Synchronous Sequential Circuits. 461-469 - James C. Miller, Charles M. Wine:
A Simple Display for Characters and Graphics. 470-475 - Harold W. Lawson Jr.:
Programming-Language-Oriented Instruction Streams. 476-485 - Richard R. Shively:
A Digital Processor to Generate Spectra in Real Time. 485-491 - Richard G. Casey, George Nagy
:
An Autonomous Reading Machine. 492-503 - Stephen R. Sedore:
More Efficient Use of the F Matrix in Practical Circuit Analysis Programs. 503-506 - Martin S. Schmookler:
High-Speed Binary-to-Decimal Conversion. 506-508 - Gio Wiederhold:
R68-19 Bulk Core in a 360/67 Time Sharing System. 520 - J. L. Smith:
R68-20 Effects of Scheduling on File Memory Applications. 520-521 - Masao Kato:
R68-21 System Architecture for Large Scale Integration. 521 - T. A. Murrell:
R68-22 Current Status of Large Scale Integration Technology. 521-522 - David J. Kuck:
R68-23 The Greenblatt Chess Program. 522 - William M. Waite:
R68-24 A Proposal for Definitions in ALGOL. 522-523 - H. A. Freedman:
R68-25 An On-Line Editor. 523 - Ben B. Barnes:
R68-26 Some Techniques for Accuracy Improvement in Analog Computation. 523-524
Volume 17, Number 6, June 1968
- Walter W. Wierwille, James R. Knight:
Off-Line Correlation Analysis of Nonstationary Signals. 525-536 - Richard O. McCary:
An Approximation to the Asymmetric Strip-Line Coupling Coefficient. 537-542 - René M. G. Wijnhoven:
A Simple High-Speed Magnetic Access Switch Matrix. 542-550 - David L. Greer:
Characterization of the Magnetic Second-Harmonic Analog Memory. 551-558 - Arthur D. Friedman, Prem R. Menon:
Synthesis of Asynchronous Sequential Circuits with Multiple-Input Changes. 559-566 - J. D. Bargainer Jr., Clarence L. Coates:
Minimal Multiplexed Threshold Gate Realizations. 566-578 - Donald L. Dietmeyer:
Bounds on the Period of Oscillatory Activity in Randomly Interconnected Networks of Neuron-Like Elements. 578-591 - Václav Dvorák:
A Two-Rail Cascade Synthesis of Boolean Functions. 592-596 - Richard C. Born, Allan K. Scidmore:
Transformation of Switching Functions to Completely Symmetric Switching Functions. 596-599 - Narsingh Deo:
Generalized Parallel Redundancy in Digital Computers. 600 - Edward G. Coffman Jr., A. C. McKellar:
On the Motion of an Unbounded, Markov Queue in Random Access Storage. 600-603 - Alfred V. Aho:
R68-27 Programming Languages for Automata. 606 - William M. McKeeman:
R68-28 A Microprogrammed Implementation of EULER on IBM System/360 Model 30. 607 - Donald A. Darms:
R68-29 Hydro System Optimization Model. 607 - Warren D. Little:
R68-30 Monte Carlo Solution of Partial Differential Equations Using a Hybrid Computer. 607-608 - Robert Gleman:
R68-31 The Effect of Digital Compensation for Computation Delay in a Hybrid Loop. 608
Volume 17, Number 7, July 1968
- Harold E. Maurer, Robert C. Ricci:
Horizons in Guidance Computer Component Technology. 621-634 - John K. Russell:
A Visual Image Processor. 635-639 - Kuo A. Chen:
Computer Aided Memory Design Using Transmission Line Models. 640-648 - Franco P. Preparata:
Convolutional Transformation and Recovery of Binary Sequences. 649-655 - William S. Meisel:
Variable-Threshold Threshold Elements. 656-667 - William S. Meisel:
Nets of Variable-Threshold Threshold Elements. 667-676 - Frederick F. Sellers Jr., Mu Yue Hsiao, LeRoy W. Bearnson:
Analyzing Errors with the Boolean Difference. 676-683 - Sergio P. Colussi, Giovanni V. Pallottino:
An Approach to Optimum Tolerance Adaptive Threshold Elements. 684-691 - Bently A. Crane:
Path Finding with Associative Memory. 691-693 - Shmuel Winograd:
A New Algorithm for Inner Product. 693-694 - Edward L. Renschler:
A Variable Counter Design Technique. 694-696 - Eugene Levine:
On the Characterizing Parameters of a Threshold Function. 696-697 - Monroe M. Newborn:
A Synthesis Technique for Binary Input-Binary Output Synchronous Sequential Moore Machines. 697-699 - Sureshchander:
Comments on "RST Flip-Flop Input Equations". 701-702 - Kenneth A. Foster:
Comments on "Basic Properties and a Construction Method for Fail-Safe Logical Systems". 702 - Hisashi Mine, Yoshihaki Koga:
Authors' Reply3. 702 - Omri Serlin:
R68-32 The IADIC: A Hybrid Computing Element. 718 - Omri Serlin:
R68-33 PHENO: A New Concept of Hybrid Computing Elements. 718-719 - Martin Y. Silberberg:
R68-34 Hybrid Apollo Docking Simulation. 719 - E. J. Copes:
R68-35 Optimal Generation of Arbitrary Functions. 719-720
Volume 17, Number 8, August 1968
- Charles A. David, Bernhard Feldman:
High-Speed Fixed Memories Using Large-Scale Integrated Resistor Matrices. 721-728 - Gustav N. Wassel:
Multiple Reflections from RC Loading of Pulse-Signal Transmission Lines. 729-737 - John Harley:
The Linear Transformer Tree. 738-746 - George H. Barnes, Richard M. Brown, Maso Kato, David J. Kuck, Daniel L. Slotnick, Richard A. Stokes:
The ILLIAC IV Computer. 746-757 - David J. Kuck:
ILLIAC IV Software and Application Programming. 758-770 - Nicolae N. Necula:
An Algorithm for the Automatic Approximate Minimization of Boolean Functions. 770-782 - K. L. Suryanarayanan, A. C. Soudack:
Analog Computer Automatic Parameter Optimization of Nonlinear Control Systems with Specific Inputs. 782-788 - Caxton C. Foster:
Determination of Priority in Associative Memories. 788-789 - Gerald P. Cardillo, King-Sun Fu:
On Suboptimal Sequential Pattern Recognition. 789-792 - Igal Kohavi, Zvi Kohavi:
Variable-Length Distinguishing Sequences and Their Application to the Design of Fault-Detection Experiments. 792-795 - A. Bouchet:
An Algebraic Method for Minimizing the Number of States in an Incomplete Sequential Machine. 795-798 - Frank M. Brown:
The Origin of the Method of Iterated Consensus. 802 - Robert M. McClure:
R68-36 Dataless Programming. 818 - Ivan Flores:
R68-37 Intercommunication of Processors and Memory. 818-819 - Stanoje P. Bingulac:
R68-38 Accurate Analog Computer Generation of Bessel Functions for Large Ranges. 819 - Arthur I. Rubin:
R68-39 Simulation of the Transfer Function of a Crustacean Muscle Bundle. 819-820
Volume 17, Number 9, September 1968
- Yao Tung Yen:
A Mathematical Model Characterizing Four-Phase MOS Circuits for Logic Simulation. 822-826 - Tsai Hwa Chen:
The Use of Delay Lines in Reading a Manchester Code. 827-845 - Thammavarapu R. N. Rao:
Error-Checking Logic for Arithmetic-Type Operations of a Processor. 845-849 - James R. Duley, Donald L. Dietmeyer:
A Digital System Design Language (DDL). 850-861 - Stephen Sik-Sang Yau, John M. Schumpert:
Design of Pattern Classifiers with the Updating Property Using Stochastic Approximation Techniques. 861-872 - Marvin Perlman:
The Synthesis of Binary Sequence Detectors. 873-880 - Eduardo Kellerman:
A Formula for Logical Network Cost. 881-884 - Jochen Beister:
On the Implementation of Failure-Tolerant Counters. 885-886 - Chin Chin Tung:
A Division Algorithm for Signed-Digit Arithmetic. 887-889 - Rodger L. Gamblin:
An Analysis of High-Speed, Linear-Passive Binary, Read-Only Stores. 889-893 - Rodger L. Gamblin, Cyril J. Tunis:
A High-Speed Threshold Memory Element. 893-894 - Celso de Renna e Souza:
A Note on Embedding Nonlinear Machines. 894-896 - Marshall C. Y. Kuo:
Solution of Nonlinear Equations. 897-898 - Joseph S. Rosko:
Comments on "Hybrid Computer Solution of Optimal Control Problems by the Maximum Principle". 899 - P. K. Sinha Roy:
Further Comments on "Synthesis of Symmetric Switching Functions Using Threshold Logic Networks"1. 899-900 - Chester C. Carroll:
R68-40 Sequential Machines and Automata Theory. 922-923 - Jerome H. Saltzer:
R68-41 Development of Executive Routines, Both Hardware and Software. 923-924 - Beverly F. Char, Codie S. Wells:
R68-42 On Designing Generalized File Records for Management Information Systems. 924 - Jon C. Strauss:
R68-43 Two Continuous System Modelling Programs. 924
Volume 17, Number 10, October 1968
- Daniel E. Atkins:
Higher-Radix Division Using Estimates of the Divisor and Partial Remainders. 925-934 - Mu Yue Hsiao:
Single-Channel Error Correction in an f-Channel System. 935-943 - John L. Shanks, Thomas W. Cairns:
Use of a Digital Convolution Device to Perform Recursive Filtering and the Cooley-Tukey Algorithm. 943-949 - Edward A. Patrick, Douglas R. Anderson, F. K. Bechtel:
Mapping Multidimensional Space to One Dimension for Computer Output Display. 949-953 - David L. Johnson, Kenneth Herbert O'Keefe:
The Application of Shift Registers to Secondary State Assignment: Part I. 954-965 - David L. Johnson, Kenneth Herbert O'Keefe:
The Application of Shift Registers to Secondary State Assignment: Part II. 966-977 - Nicolae N. Necula:
An Algorithm for Multithreshold Threshold Element Synthesis. 978-985 - L. K. Wadhwa:
Simulation of Nonquiescent Third-Order Systems by a Single Operational Amplifier. 986-987 - Chi-Hau Chen:
Computer Processing of Radiation Sensor PCM Data. 987-989 - Herbert D. Goldman, J. Rom:
Considering Solder Connections, Does Triplicated Majority Voting Apply to Integrated Circuits. 990-992 - N. Kouvaras, D. Lagoyannis, L. Ponticopoulos:
A Digital System of Simultaneous Addition of Several Binary Numbers. 992-997 - Donald R. Haring:
A Technique for Improving the Reliability of Certain Classes of Threshold Elements. 997-998 - Celso de Renna e Souza:
R 68-44 Mathematical Logic. 1003 - William A. Farrand:
R68-45 Electrically Alterable Digital Differential Analyzer. 1004
Volume 17, Number 11, November 1968
- Frank A. Russo, Robert J. Valek:
Process Performance Computer for Adaptive Control Systems. 1027-1037 - Robert H. Mitchell, Thomas Williams, William D. Ryan:
A Delay Line and Logic Circuits Utilizing Charge-Storage Subharmonic Parametric Oscillators. 1037-1043 - Giovanni B. Gerace:
Digital System Design Automation - A Method for Designing a Digital System as a Sequential Network System. 1044-1061 - Sigurd Waaben:
High-Speed, Interlaced WRITE and READ-Only Operation of a Plated-Wire Memory System. 1062-1065 - Akio Sasaki:
The Basis for Implementation of Ad idive Operations in the Residue Number System. 1066-1073 - Giuseppe Fantauzzi:
NORNAND Maitra Cascades. 1074-1080 - Yao Tung Yen:
Some Theoretical Properties of Multithreshold Realizable Functions. 1081-1088 - Albert W. Small:
Partitions and Edge-Weighted Pair-Graphs. 1089 - M. G. Harman:
An Attempt to Design an Improved Multiplication System. 1090 - Edward S. Davidson, Gernot Metze:
Comments on "An Algorithm for Synthesis of Multiple-Output Combinational Logic". 1091-1092 - Edward G. Coffman Jr., Martin S. Schmookler:
A Random-Walk Model of a Queue Storage Problem. 1093-1095 - Jay Earley:
R68-46 Use of Transition Matrices in Compiling. 1098 - Dennis W. Fife:
R68-47 Computer Scheduling Methods and Their Countermeasures. 1098-1099 - William M. Newman:
R68-48 A Multiprogramming Monitor for Small Machines. 1099 - William C. McGee:
R68-49 Virtual Memory Processes and Sharing in Multics. 1099 - Charles L. Jackson:
R68-50 Multiprogramming System Performance Measurement and Analysis. 1100
Volume 17, Number 12, December 1968
- Wolfgang K. Giloi, Hartmut Grebe:
Construction of Multistep Integration Formulas for Simulation Purposes. 1121-1131 - Glen G. Langdon Jr.:
Analysis of Asynchronous Circuits Under Different Delay Assumptions. 1131-1143 - Leo Hellerman, Gerhard E. Hoernes:
Control Storage Use in Implementing an Associative Memory for a Time-Shared Processor. 1144-1151 - John E. Gaffney Jr.:
Sequential Decision-Making Device for Information-Processing Applications. 1151-1156 - William G. Wee:
Generalized Inverse Approach to Adaptive Multiclass Pattern Classification. 1157-1164 - James A. Cadzow:
Synthesis of Nonlinear Decision Boundaries by Cascaded Threshold Gates. 1165-1172 - M. Silverberg:
Near-Optimal Ordering of Electronic Circuit Equations. 1173-1174 - Héctor Arango, Jorge Santos, Alicia Chacur:
Ternary Cyclo-Decompositions. 1175-1176 - George Hannauer:
R68-51 The Design of an Automatic Patching System. 1179-1181 - Codie Wells:
R68-52 The Structure of the "The"-Multiprogramming System. 1181 - W. R. Sutherland:
R68-53 A System for Interactive Graphical Programming. 1181-1182
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