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ORCIDInternational Journal of Reconfigurable Computing, Volume 2018
Volume 2018, 2018
- Nitish Das
, P. Aruna Priya:
FPGA Implementation of Reconfigurable Finite State Machine with Input Multiplexing Architecture Using Hungarian Method. 6831901:1-6831901:15 - Qianqiao Chen, Vaibhawa Mishra, José L. Núñez-Yáñez, Georgios Zervas:
Reconfigurable Network Stream Processing on Virtualized FPGA Resources. - Omar Ahmed, Shawki Areibi, Karanvir Chattha, Ben Kelly:
Corrigendum to "PCIU: Hardware Implementations of an Efficient Packet Classification Algorithm with an Incremental Update Capability". - Omar Ahmed, Shawki Areibi, Gary Gréwal:
Corrigendum to "Hardware Accelerators Targeting a Novel Group Based Packet Classification Algorithm". - Shuaizhi Guo, Tianqi Wang, Linfeng Tao, Teng Tian, Zikun Xiang, Xi Jin:
RP-Ring: A Heterogeneous Multi-FPGA Accelerator. - Lilia Kechiche, Lamjed Touil, Bouraoui Ouni:
Toward the Implementation of an ASIC-Like System on FPGA for Real-Time Video Processing with Power Reduction. - Bruno da Silva, An Braeken, Federico Domínguez, Abdellah Touhafi:
Exploiting Partial Reconfiguration through PCIe for a Microphone Array Network Emulator. - Li Luo, Yakun Wu, Fei Qiao, Yi Yang, Qi Wei, Xiaobo Zhou, Yongkai Fan, Shuzheng Xu, Xinjun Liu, Huazhong Yang:
Design of FPGA-Based Accelerator for Convolutional Neural Network under Heterogeneous Computing Framework with OpenCL. 1785892:1-1785892:10 - Bahram N. Uchevler, Kjetil Svarstad:
Modelling and Assertion-Based Verification of Run-Time Reconfigurable Designs Using Functional Programming Abstractions. 3276159:1-3276159:25 - Omar Ahmed, Shawki Areibi, Robert Collier, Gary William Grewal:
Corrigendum to "An Impulse-C Hardware Accelerator for Packet Classification Based on Fine/Coarse Grain Optimization". 6075043:1 - Faisal Mahmood, Mart Toots, Lars-Göran Öfverstedt, Ulf Skoglund:
Algorithm and Architecture Optimization for 2D Discrete Fourier Transforms with Simultaneous Edge Artifact Removal. 1403181:1-1403181:17 - Ka Fai Cedric Yiu, Siow Yong Low:
On a Real-Time Blind Signal Separation Noise Reduction System. 3721756:1-3721756:9
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