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ORCIDIEEE Computer Architecture Letters, Volume 24
Volume 24, Number 1, January - June 2025
- Haseung Bong
, Nahyeon Kang, Youngsok Kim, Joonsung Kim, Hanhwi Jang:
IntervalSim++: Enhanced Interval Simulation for Unbalanced Processor Designs. 1-4 - Myoungjun Chun, Jae Yong Lee, Inhyuk Choi, Jisung Park, Myungsuk Kim, Jihong Kim:
Straw: A Stress-Aware WL-Based Read Reclaim Technique for High-Density NAND Flash-Based SSDs. 5-8 - Chaithanya Krishna Vadlamudi, Bahar Asgari:
Electra: Eliminating the Ineffectual Computations on Bitmap Compressed Matrices. 9-12 - Jiwon Lee, Yunjae Lee, Youngeun Kwon, Minsoo Rhu:
Characterization and Analysis of the 3D Gaussian Splatting Rendering Pipeline. 13-16 - Sepehr Tabrizchi, Mehrdad Morsali, David Z. Pan, Shaahin Angizi, Arman Roohi:
PINSim: A Processing In- and Near-Sensor Simulator to Model Intelligent Vision Sensors. 17-20 - M. Vardhana, Rohan Pinto:
High-Performance Winograd Based Accelerator Architecture for Convolutional Neural Network. 21-24 - E. Kritheesh, Biswabandan Panda:
SPAM: Streamlined Prefetcher-Aware Multi-Threaded Cache Covert-Channel Attack. 25-28 - Houxiang Ji, Minho Kim, Seonmu Oh, Daehoon Kim, Nam Sung Kim:
Cooperative Memory Deduplication With Intel Data Streaming Accelerator. 29-32 - Woohyung Choi, Jinwoo Jeong, Hanhwi Jang, Jeongseob Ahn:
GPU-Centric Memory Tiering for LLM Serving With NVIDIA Grace Hopper Superchip. 33-36 - Jongho Baik, Jonghyeon Kim, Chang Hyun Park, Jeongseob Ahn:
Accelerating Page Migrations in Operating Systems With Intel DSA. 37-40 - Yunhyeong Jeon, Minwoo Jang, Hwanjun Lee, Yeji Jung, Jin Jung, Jonggeon Lee, Jinin So, Daehoon Kim:
RoPIM: A Processing-in-Memory Architecture for Accelerating Rotary Positional Embedding in Transformer Models. 41-44 - Sudhanva Gurumurthi, Mattan Erez:
Editorial: A Letter From the Editor-in-Chief of IEEE Computer Architecture Letters. iii-iv
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