


default search action
TrustCom/BigDataSE/ISPA 2015: Helsinki, Finland - Volume 3
- 2015 IEEE TrustCom/BigDataSE/ISPA, Helsinki, Finland, August 20-22, 2015, Volume 3. IEEE 2015
The 13th IEEE International Symposium on Parallel and Distributed Processing with Applications
ISPA Session I
- Maria Carpen-Amarie
, Dave Dice, Patrick Marlier, Gaël Thomas, Pascal Felber
:
Evaluating HTM for Pauseless Garbage Collectors in Java. 1-8 - Li-Hsing Yen, Jean-Yao Huang:
Selfish Self-Stabilizing Approach to Maximal Independent Sets. 9-16 - Emil Rakadjiev, Taku Shimosawa, Hiroshi Mine, Satoshi Oshima:
Parallel SMT Solving and Concurrent Symbolic Execution. 17-26 - Prashant Jalan, Arihant Kumar Jain, Subhajit Roy:
Identifying Hierarchical Structures in Sequences on GPU. 27-36
ISPA Session II
- Takeshi Iwashita, Naokazu Takemura, Akihiro Ida, Hiroshi Nakashima:
A New Fill-in Strategy for IC Factorization Preconditioning Considering SIMD Instructions. 37-44 - Ayman Tarakji, Alexander Gladis, Tarek Anwar, Rainer Leupers:
Enhanced GPU Resource Utilization through Fairness-aware Task Scheduling. 45-52 - Shixiong Xu, David Gregg:
Exploiting Hyper-Loop Parallelism in Vectorization to Improve Memory Performance on CUDA GPGPU. 53-60
ISPA Session III
- Nentawe Gurumdimma, Arshad Jhumka, Maria Liakata
, Edward Chuah
, James C. Browne:
Towards Increasing the Error Handling Time Window in Large-Scale Distributed Systems Using Console and Resource Usage Logs. 61-68 - Ian Masliah, Marc Baboulin, Joël Falcou:
Metaprogramming Dense Linear Algebra Solvers Applications to Multi and Many-Core Architectures. 69-76 - Sayyed Ali Mirsoleimani, Aske Plaat
, H. Jaap van den Herik
, Jos Vermaseren:
Parallel Monte Carlo Tree Search from Multi-core to Many-core Processors. 77-83 - Alejandro Erickson, Abbas Eslami Kiasari, Javier Navaridas
, Iain A. Stewart
:
Routing Algorithms for Recursively-Defined Data Centre Networks. 84-91 - M. Carmen Ruiz
, Javier L. Calleja, Diego Cazorla
:
Petri Nets Formalization of Map/Reduce Paradigm to Optimise the Performance-Cost Tradeoff. 92-99
ISPA Session IV
- Ahmad Maatouki, Jörg Meyer
, Marek Szuba
, Achim Streit
:
A Horizontally-Scalable Multiprocessing Platform Based on Node.js. 100-107 - Shin Morishima, Hiroki Matsutani:
Performance Evaluations of Document-Oriented Databases Using GPU and Cache Structure. 108-115 - Andreas Karlsson, Joar Sohl, Dake Liu:
Energy-Efficient Sorting with the Distributed Memory Architecture ePUMA. 116-123 - Lars Frydendal Bonnichsen, Christian Wilhelm Probst
, Sven Karlsson
:
Hardware Transactional Memory Optimization Guidelines, Applied to Ordered Maps. 124-131 - Kenichi Kourai
, Riku Nakata:
Analysis of the Impact of CPU Virtualization on Parallel Applications in Xen. 132-139
The First IEEE International Workshop on Reengineering for Parallelism in Heterogeneous Parallel Platforms (RePara)
RePara Session I
- Marco Danelutto
, Tiziano De Matteis
, Gabriele Mencagli
, Massimo Torquati
:
Parallelizing High-Frequency Trading Applications by Using C++11 Attributes. 140-147 - Rafael Sotomayor, Luis Miguel Sánchez, Javier García Blas
, Alejandro Calderón
, Javier Fernández
:
AKI: Automatic Kernel Identification and Annotation Tool Based on C++ Attributes. 148-153 - Lu Li, Christoph W. Kessler:
MeterPU: A Generic Measurement Abstraction API Enabling Energy-Tuned Skeleton Backend Selection. 154-159
RePara Session II
- Adrián Castelló
, Rafael Mayo
, Judit Planas
, Enrique S. Quintana-Ortí
:
Exploiting Task-Parallelism on GPU Clusters via OmpSs and rCUDA Virtualization. 160-165 - Andrés Rodríguez
, Angeles G. Navarro
, Rafael Asenjo
, Antonio Vilches, Francisco Corbera, María Jesús Garzarán:
Parallel Pipeline on Heterogeneous Multi-processing Architectures. 166-171 - Marco Aldinucci
, Marco Danelutto
, Maurizio Drocco
, Peter Kilpatrick
, Guilherme Peretti Pezzi, Massimo Torquati
:
The Loop-of-Stencil-Reduce Paradigm. 172-177 - Dénes Bán
, Rudolf Ferenc
, István Siket, Ákos Kiss:
Prediction Models for Performance, Power, and Energy Efficiency of Software Executed on Heterogeneous Hardware. 178-183
The Third IEEE International Workshop on Parallelism in Bioinformatics (PBio)
PBio: Cluster Computing in Bioinformatics
- Sebastian Daberdaku
, Carlo Ferrari
:
Parallel Computation of Voxelized Macromolecular Surfaces by Spatial Slicing. 184-189 - Héctor Martínez
, Sergio Barrachina
, Maribel Castillo
, Joaquín Tárraga, Ignacio Medina, Joaquín Dopazo, Enrique S. Quintana-Ortí
:
Scalable RNA Sequencing on Clusters of Multicore Processors. 190-195 - Sandino Vargas Perez
, Fahad Saeed:
A Parallel Algorithm for Compression of Big Next-Generation Sequencing Datasets. 196-201 - Ferdinando Auricchio
, Marco Ferretti, Adrien Lefieux, Mirto Musci, Alessandro Reali, Santi Trimarchi
, Alessandro Veneziani:
Assessment of a Black-Box Approach for a Parallel Finite Elements Solver in Computational Hemodynamics. 202-207
PBio: Hardware Accelerators in Bioinformatics
- Enzo Rucci
, Carlos García
, Guillermo Botella Juan, Armando De Giusti, Marcelo R. Naiouf, Manuel Prieto-Matías
:
Smith-Waterman Protein Search with OpenCL on an FPGA. 208-213 - Lidia Kuan, Leonel Sousa
, Pedro Tomás
:
Accelerating Phylogenetic Inference on Heterogeneous OpenCL Platforms. 214-221 - Suejb Memeti
, Sabri Pllana:
Accelerating DNA Sequence Analysis Using Intel(R) Xeon Phi(TM). 222-227 - Glenn R. Luecke, Nathan T. Weeks
, Brandon M. Groth, Marina Kraeva, Li Ma, Luke M. Kramer, James E. Koltes, James M. Reecy:
Fast Epistasis Detection in Large-Scale GWAS for Intel Xeon Phi Clusters. 228-235
PBio: Many-core, Multi-core, and Distributed Computing in Bioinformatics
- Josefina Lenis, Miquel Àngel Senar
:
On the Performance of BWA on NUMA Architectures. 236-241 - Álvaro Rubio-Largo
, Miguel A. Vega-Rodríguez
, David L. González-Álvarez:
Parallel H4MSA for Multiple Sequence Alignment. 242-247 - Francesco Asnicar, Luca Erculiani, Francesca Galante, Caterina Gallo, Luca Masera
, Paolo Morettin
, Nadir Sella, Stanislau Semeniuta, Thomas Tolio, Giulia Malacarne, Kristof Engelen, Andrea Argentini
, Valter Cavecchia, Claudio Moser, Enrico Blanzieri
:
Discovering Candidates for Gene Network Expansion by Distributed Volunteer Computing. 248-253
The First IEEE International Workshop on Distributed Intelligent Automation Systems (DIAS)
DIAS Session I: Models and Applications for Industrial Cyber-physical Systems
- Arash Mousavi, Valeriy Vyatkin, Yulia Berezovskaya
, Xiaojing Zhang:
Cyber-physical Design of Data Centers Cooling Systems Automation. 254-260 - Chen-Wei Yang, Kashif Gulzar, Seppo A. Sierla
, Valeriy Vyatkin:
Fuzzy Logic Based Prosumer Agent in a Modular Smart Grid Prosumer Architecture. 261-268 - Stanislav L. Belyakov, Marina Savelyeva
, Jeffrey Yan, Valeriy Vyatkin:
Adaptation of Material Flows in Mechanical Transportation Systems Based on Observation Experience. 269-274 - Gerardo Santillan Martinez, Tommi Karhela, Valeriy Vyatkin, Tuomas Miettinen, Cheng Pang:
An OPC UA Based Architecture for Testing Tracking Simulation Methods. 275-280 - Pavel Kustarev
, Sergei Bykovskii
, Vasiliy Milin, Alexander Antonov
:
Model-Driven Runtime Embedded Monitoring for Industrial Controllers. 281-286
DIAS Session II: Distributed Design Architectures
- Victor Dubinin
, Valeriy Vyatkin, Hans-Michael Hanisch:
Synthesis of Safety Controllers for Distributed Automation Systems on the Basis of Reverse Safe Net Condition/Event Systems. 287-292 - Per Lindgren, Marcus Lindner, David Pereira
, Luís Miguel Pinho
:
A Formal Perspective on IEC 61499 Execution Control Chart Semantics. 293-300 - Igor Buzhinsky
, Cheng Pang, Valeriy Vyatkin:
Formal Modeling of Testing Software for Cyber-Physical Automation Systems. 301-306 - Daniil Chivilikhin, Anatoly Shalyto
, Valeriy Vyatkin:
Inferring Automata Logic from Manual Control Scenarios: Implementation in Function Blocks. 307-312 - Sandeep Patil
, Victor Dubinin
, Valeriy Vyatkin:
Formal Verification of IEC61499 Function Blocks with Abstract State Machines and SMV - Modelling. 313-320

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.