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18th SLIP 2016: Austin, TX, USA
- Baris Taskin, Tsung-Yi Ho:
Proceedings of the 18th System Level Interconnect Prediction Workshop, SLIP 2016, Austin, TX, USA, June 4, 2016. ACM 2016, ISBN 978-1-4503-4430-2 - Ishan G. Thakkar, Sai Vineel Reddy Chittamuru, Sudeep Pasricha:
A Comparative Analysis of Front-End and Back-End Compatible Silicon Photonic On-Chip Interconnects. 1:1-1:8 - Chih-Cheng Hsu, Mark Po-Hung Lin, Masanori Hashimoto:
Latch Clustering for Minimizing Detection-to-Boosting Latency Toward Low-Power Resilient Circuits. 2:1-2:6 - Carrie Segal, Aditya Dalakoti, Merritt Miller, Forrest Brewer:
Connectivity Effects on Energy and Area for Neuromorphic System with High Speed Asynchronous Pulse Mode Links. 3:1-3:7 - Mohammad A. Ahmed, Sucheta Mohapatra, Malgorzata Chrzanowska-Jeske:
Buffered Interconnects in 3D IC Layout Design. 4:1-4:8 - Roman P. Bazylevych, Marek Palasinski, Lubov Bazylevych:
Topologically-Geometric Routing. 5:1-5:6 - Wei-Ting Jonas Chan, Andrew B. Kahng, Jiajia Li:
Revisiting 3DIC Benefit with Multiple Tiers. 6:1-6:8 - Enes Eken, Ismail Bayram, Yaojun Zhang, Bonan Yan, Wenqing Wu, Hai (Helen) Li, Yiran Chen:
Spin-Hall Assisted STT-RAM Design and Discussion. 7:1-7:4 - Naseef Mansoor, Md Shahriar Shamim, Amlan Ganguly:
A Demand-Aware Predictive Dynamic Bandwidth Allocation Mechanism for Wireless Network-on-Chip. 8:1-8:8
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